JNTU
JNTU B.Tech II SWITCHING THEORY AND LOGIC DESIGN Previous Question Paper (February - 2024 - R13)
Question paper consists of Part A, Part B. Part A is compulsory, which carries 25 marks. In Part A, answer all questions. In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.
Part A
What is Gray code? List out limitations of it.
Answer
Gray code is a non-weighted binary code where consecutive numbers differ by only one bit position. Its primary limitations are that it is not suitable for direct arithmetic operations and requires conversion to standard binary or BCD for mathematical processing.
How do you obtain dual of an expression? Give suitable example.
Answer
To obtain the dual of a Boolean expression, replace every AND operator with an OR operator, every OR operator with an AND operator, and interchange all 0s and 1s. Variables and their complements remain unchanged.
Example: The dual of the expression
What are merits of K-map method?
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Design a full adder using two half address.
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Compare latch and flip flop.
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Explain the timing considerations of sequential circuits.
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What are the basic types of shift registers?
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Compare asynchronous and synchronous counters.
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Define finite state machine.
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What is an ASM chart? Explain.
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Part B
Convert the given Gray code number to equivalent binary 001001011110010.
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Convert (A0F9.0EBA)16 to decimal, binary, octal.
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Obtain dual of the following Boolean expressions i) AB+A(B+C)+B' (B+D) ii) A+B+A'B'C.
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Obtain the compliment of the following Boolean expressions i) A'B+A'BC'+A'BCD+A'BC'D'E ii) ABEF+ABE'F'+A'B'EF.
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Define i) Prime implicants ii) Essential prime implicants.
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Minimize the following expression using K-map and realize using NOR Gates. f = π M(0,4,6,7,8,12,13,14,15).
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Explain the differences between a MUX and a DEMUX. Realize 16-input multiplexer by cascading of two 8-input multiplexers 74151.
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Realize the function f(A,B,C,D)=π(1,4,6,10,14)+d(0,8,11,15) using: i) 16:1 MUX ii) 8:1 MUX.
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What is meant by ‘edge triggered’? Differentiate SR-FF and JK-FF with their functional operation and excitation tables.
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Explain the realization of SR flip-flop, JK flip-flop using D flip-flop.
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Realize D-FF and T-FF using JK-FF. Draw the logic diagrams with their truth tables.
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Deduce the design procedure for sequential logic circuits and give the classification of sequential logic circuits.
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Discuss about synchronous and ripple counters. Compare their merits and demerits.
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What do you mean by universal shift register? Draw and explain its circuit diagram and operation.
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What is a shift register? Explain about the following modes of operations in a four bit shift register (i) shift right (ii) shift left (iii) bidirectional.
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Design and construct MOD-5 synchronous counter using JK flip flops.
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What are the capabilities and limitations of finite state machines? Discuss.
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What are the Moore and Melay machines? Compare them.
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Name the elements of an ASM chart and define each one of them.
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Explain the control subsystem implementation of weighing machine.
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