JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year SWITCHING THEORY AND LOGIC DESIGN Previous Question Paper (September/October - 2023 - R15)

B.Tech | II Year | I Semester | R15 | September/October - 2023

Answer PaperPaper Code: 123BUMaximum Marks: 75Time: 3 Hours

Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.

Part A

125 marks
a

State the basic theorems in boolean algebra.

2 marks

Answer

The basic theorems of Boolean algebra include the Commutative law (A+B=B+A, AB=BA), Associative law (A+(B+C)=(A+B)+C, A(BC)=(AB)C), Distributive law (A(B+C)=AB+AC), Identity law (A+0=A, A·1=A), Complement law (A+A'=1, A·A'=0), and Idempotent law (A+A=A, A·A=A).

b

Convert 10101101.0111 to octal equivalent and hexadecimal equivalent.

3 marks

Answer

To convert 10101101.0111 to octal, group bits in threes: (010)(101)(101).(011)(100) = 255.348. To convert to hexadecimal, group bits in fours: (1010)(1101).(0111) = AD.716.

c

List out the applications of Combinational circuits.

2 marks

Answer

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d

Draw a four-bit adder circuit using full adders.

3 marks

Answer

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e

Compare latch and flip flop.

2 marks

Answer

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f

What is meant by Clock Skew?

3 marks

Answer

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g

Define State Diagram and State Table.

2 marks

Answer

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h

What are the advantages of Ring Counter?

3 marks

Answer

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i

Define Mealy Circuit.

2 marks

Answer

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j

Mention the salient features of the ASM chart.

3 marks

Answer

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Part B

210 marks
a

What is Universal Gates? Realize all the logic gates using NAND.

5 marks

Answer

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b

How is the error detection and correction carried out using the parity method in digital data transmission?

5 marks

Answer

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OR
310 marks
a

Prove that

AB'C + B + BD' + ABD' + A'C = B + C
.

5 marks

Answer

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b

Convert the Boolean function

F(A,B,C,D) = A + BC + ACD
into standard POS form.

5 marks

Answer

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410 marks
a

Find the minimal sum of products for the Boolean expression,

f = Σ m(1,2,3,5,7,8,9,10,12,14,15)
, using the K-Map.

5 marks

Answer

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b

What is the drawback of a 4-bit parallel adder? And explain how to overcome the drawback with the help of a carry look-ahead adder.

5 marks

Answer

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OR
510 marks
a

Minimize the following expressions using K-map and realize using NAND Gates.

f = Σ m(1,3,5,8,9,11,15) + d(2,13)

5 marks

Answer

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b

What is a multiplexer? Implement the Boolean function

F(A,B,C,D) = Σ m(1,3,4,11,12,13,14,15)
with 8:1 MUX.

5 marks

Answer

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610 marks
a

Differentiate combinational and sequential circuits.

5 marks

Answer

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b

Design SR Flip Flop using JK-Flip Flop.

5 marks

Answer

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OR
710 marks
a

Convert the T flip-flop into the D and JK flip-flops.

5 marks

Answer

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b

What are the fundamentals of Sequential machine operation?

5 marks

Answer

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810 marks
a

Draw the circuit diagram of the MOD-10 Counter and explain its operation.

5 marks

Answer

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b

Describe a 4-bit Universal shift register with a neat diagram.

5 marks

Answer

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OR
910 marks
a

What is a shift register? Explain the following modes of operations in a four-bit shift register (i) shift right (ii) shift left (iii) bidirectional.

5 marks

Answer

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b

Design a Mod-5 synchronous counter using T flip-flops.

5 marks

Answer

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1010 marks
a

Differentiate between an ASM chart and a conventional flow chart.

5 marks

Answer

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b

Explain the procedure for state minimization using the merger graph and merger table.

5 marks

Answer

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OR
1110 marks
a

With the help of the State table and State diagram explain the operation of the Sequence generator.

5 marks

Answer

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b

Explain in detail the ASM technique of designing a sequential circuit.

5 marks

Answer

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About this paper

This page contains the solved question paper with answers of SWITCHING THEORY AND LOGIC DESIGN from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech EEE II Year I Semester, September/October - 2023, R15.

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