JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III COMPUTER ARCHITECTURE Previous Question Paper (September - 2021 - R18)

The control unit is the brain of the computer that directs the flow of data and instructions. Its design consists of two main parts: the instruction register (IR), which holds the current opcode, and the control logic, which generates the necessary timing and control signals. The control unit receives inputs from the instruction register, the timing signal generator, and status flags from the ALU.

The design typically involves a sequence counter (SC) that provides timing signals T0, T1, ..., Tn. These signals, combined with the decoded outputs of the instruction register, form the control functions. For example, a control signal for a register transfer like 'Read' or 'Write' is generated by a Boolean function of the form: x = T(i) * I, where T(i) is the timing signal and I is the decoded instruction. These signals are fed into the control inputs of various registers, multiplexers, and the ALU to execute the micro-operations required for each instruction cycle.

The hardware implementation for binary multiplication requires an accumulator (AC), a multiplier register (Q), a sequence counter (SC), and an adder. The multiplicand is stored in register B. The process follows the Booth or standard shift-and-add algorithm.

Given Multiplicand B = 10111 (23) and Multiplier A = 10011 (19):

1. Initialize AC = 00000, Q = 10011, B = 10111, SC = 5.
2. Cycle 1: LSB of Q is 1. Add B to AC: AC = 00000 + 10111 = 10111. Shift right AC and Q: AC = 01011, Q = 11001. SC = 4.
3. Cycle 2: LSB of Q is 1. Add B to AC: AC = 01011 + 10111 = 100010. Keep lower 5 bits: AC = 00010. Shift right AC and Q: AC = 00001, Q = 01100. SC = 3.
4. Cycle 3: LSB of Q is 0. No addition. Shift right AC and Q: AC = 00000, Q = 10110. SC = 2.
5. Cycle 4: LSB of Q is 0. No addition. Shift right AC and Q: AC = 00000, Q = 01011. SC = 1.
6. Cycle 5: LSB of Q is 1. Add B to AC: AC = 00000 + 10111 = 10111. Shift right AC and Q: AC = 01011, Q = 11011. SC = 0.

Final product is the concatenation of AC and Q, resulting in 0101111011, which is 379 in decimal (23 * 19 = 437, noting the bit-width limitations of a 5-bit register system).