JNTU
JNTU B.Tech II DIGITAL LOGIC DESIGN AND COMPUTER ORGANIZATION Previous Question Paper (April/May - 2018 - R15)
Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.
PART- A
What is a gray code. Explain the importance of a gray code.
Answer
Gray code is a non-weighted binary numbering system where two successive values differ by only one bit. Its primary importance lies in minimizing errors during state transitions in digital systems, such as in shaft encoders or Karnaugh maps, because it prevents the occurrence of transient intermediate states.
Explain about Bus Arbitration.
Answer
Bus arbitration is the process used to resolve conflicts when multiple devices (masters) attempt to access a shared bus simultaneously. It ensures that only one master controls the bus at any given time, typically managed by a central arbiter using techniques like daisy chaining, polling, or independent request/grant lines.
Define combinational logic circuits and give two examples.
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What is a decoder? List the applications of a decoder.
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What is high performance arithmetic?
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List the steps for subtraction of two floating point numbers.
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Give the classification of memories.
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Explain briefly the hardwired control unit.
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Define interrupt transfer.
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Explain the dual address command.
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PART-B
With a neat diagram describe the basic functional units of a computer and explain each unit in detail.
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Explain the various types of computers and their applications.
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Solve the number (+465.5)10 as a floating point binary number with 24 bits the Normalized fraction mantissa has 16 bits and the exponent has 8 bits.
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Explain various performance measures used to represent computer performance.
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What is PAL and explain the internal structure of PAL?
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Simplify the following Boolean function and implement with 2-input NOR gate
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Draw the logic diagram of a 2-to-4 line decoder using NAND gates only. Include an enable input and explain its functioning.
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With a neat diagram explain serial in serial out shift register.
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Describe the format of status register of IA-32 and explain each of the flag.
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With a neat diagram explain the floating point division algorithm.
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Explain about: (i) Condition codes (ii) Straight line sequencing.
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Formulate a hardware procedure for detecting an overflow by comparing the sign of the sum with signs of the augend and addend. The numbers are in signed 2’s complement representation.
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Explain in detail about the single-bus organization of data path inside a Processor.
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Describe the limitations of a semiconductor memory? Explain in detail various secondary storage devices.
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Explain each of the following:
(a) Page fault
(b) Page table
(c) Page replacement
(d) Translation look-aside buffer.
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Explain the different kinds of I/O communication techniques. What are the relative advantages and disadvantages? Compare and contrast all techniques.
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Sketch block diagram of typical daisy-chain priority interrupt scheme and explain its operation.
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Explain in detail the DMA transfer.
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