JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II Year DIGITAL LOGIC DESIGN AND COMPUTER ORGANIZATION Previous Question Paper (September/October - 2023 - R13)
Note: i) Question paper consists of Part A, Part B. ii) Part A is compulsory, which carries 25 marks. In Part A, answer all questions. iii) In Part B, Answer any one question from each unit. Each question carries 10 marks and may have a, b as sub questions.
PART - A
Convert the binary number 11101 to its decimal and BCD equivalent.
Answer
To convert the binary number 11101 to decimal, calculate the sum of the powers of 2 for each bit position: 1(24) + 1(23) + 1(22) + 0(21) + 1(20) = 16 + 8 + 4 + 0 + 1 = 29. The decimal equivalent is 29. To convert to BCD, represent each decimal digit by its 4-bit binary equivalent: 2 is 0010 and 9 is 1001. Thus, the BCD equivalent is 00101001.
Explain the role of the address bus in a computer system.
Answer
The address bus is a unidirectional communication path used by the CPU to specify the physical memory address or the I/O port location it intends to access. Its primary role is to identify the specific source or destination for data transfer operations.
Key functions include:
- Memory Addressing: It carries the address of the memory location from which data is to be read or to which data is to be written.
- I/O Selection: It identifies specific input/output devices or registers during I/O operations.
- Capacity Determination: The width of the address bus (number of lines) determines the maximum addressable memory space of the system, calculated as 2 to the power of n, where n is the number of lines.
Explain how a D flip-flop differs from a T flip-flop.
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What is excitation table? Give the excitation table for JK, SR, T and D Flipflops.
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Explain how the size of memory addresses is determined by the number of address lines in a computer's memory system.
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Describe the key difference between the multiplication and division algorithms for fixed-point numbers.
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Explain the key difference between Random Access Memory (RAM) and Read-Only Memory (ROM).
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Describe a register transfer operation for loading a value from memory into a CPU register.
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What are the advantages of DMA transfer?
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Explain the difference between programmed I/O and interrupt-driven I/O.
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PART - B
Define fixed-point and floating-point representations and highlight their use in computer systems with examples. Explain the advantages and disadvantages of each representation.
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Discuss the concept of multiprocessors and how they can improve performance through parallel processing.
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Convert the following to binary and then to Gray code:
i) (257.89)10 ii) (489.27)8 iii) (1CDF.6)16
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With a neat logic circuit explain about binary parallel adder/sub tractor.
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Design a Decade counter using JK flip-flops.
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Solve the multilevel NAND circuit for the following function:
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Discuss the concept of Programmable Logic Devices (PLDs) and their advantages in digital circuit design.
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Provide an example, illustrating how memory addresses are used to access data in a computer’s memory.
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Explain the various addressing modes with suitable example.
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Describe the algorithm for floating-point multiplication and highlight the challenges associated with maintaining precision.
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Explain Booths multiplication algorithm with an example.
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Explain how microinstructions are used in micro programmed control to execute complex instructions.
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Explain the characteristics and uses of Random Access Memory (RAM) and Read-Only Memory (ROM) in computer memory.
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Explain the concept of virtual memory and how it extends the effective memory capacity of a computer.
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Explain the concept of pipelining in instruction execution and its impact on CPU performance.
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Explain the purpose and features of Universal Serial Bus as a widely adopted I/O interface.
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Describe the role of buses in connecting I/O devices to the CPU and memory.
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With an example explain the scenario where hardware interrupts are used to handle I/O operations efficiently.
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Explain the handshake control data transfer during input and output operation in asynchronous bus with timing diagram.
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