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JNTU B.Tech III ANALOG AND DIGITAL IC APPLICATIONS Previous Question Paper (November/December - 2018 - R16)

B.Tech | III | III-I | R16 | November/December - 2018

Answer PaperPaper Code: 135BXMaximum Marks: 75Time: 3 hours

Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.

Part A

125 marks
a

List the classification of IC.

2 marks

Answer

Integrated circuits are primarily classified based on the manufacturing process as Monolithic ICs, Thin-film ICs, Thick-film ICs, and Hybrid ICs. Based on the level of integration, they are classified as SSI (Small Scale Integration), MSI (Medium Scale Integration), LSI (Large Scale Integration), VLSI (Very Large Scale Integration), and ULSI (Ultra Large Scale Integration).

b

Draw ideal op amp and equivalent circuit and also give its output voltage.

3 marks

Answer

An ideal op-amp is represented as a voltage-controlled voltage source with infinite input impedance, zero output impedance, and infinite open-loop gain. The equivalent circuit shows two input terminals (inverting and non-inverting) and a dependent voltage source at the output. The output voltage is given by:

Vout = AOL(V+ - V-)

where AOL is the open-loop gain, V+ is the non-inverting input voltage, and V- is the inverting input voltage.

c

Write the significance of upper and lower threshold voltages in Schmitt trigger circuit.

2 marks

Answer

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d

Describe the operation of wein bridge oscillator.

3 marks

Answer

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e

Define capture range and pull in time of PLL.

2 marks

Answer

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f

The basic step of a 9 bit DAC is 10.3mv. If 000000000 represents 0v. What output is produced if the input is 101101111?

3 marks

Answer

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g

Draw a standard TTL NAND gate logic diagram.

2 marks

Answer

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h

Mention the applications of decoder and demultiplexers.

3 marks

Answer

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i

Design a 3-bit synchronous counter using JK flip-flop.

2 marks

Answer

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j

Explain the differences between SRAM and DRAM.

3 marks

Answer

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Part B

210 marks
a

Derive the voltage gain of non inverting amplifier.

5 marks

Answer

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b

Derive common mode and difference mode gain of differential amplifier.

5 marks

Answer

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OR
310 marks
a

Derive the output voltage Vo of instrumentation amplifier.

7 marks

Answer

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b

Explain the application of op amp as Multiplier.

3 marks

Answer

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410 marks
a

Explain Astable multivibrator for square wave generation.

7 marks

Answer

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b

Describe the operation of VCO.

3 marks

Answer

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OR
510 marks
a

Design a second order Butterworth high pass filter with a lower cut off frequency of 1 KHz.

6 marks

Answer

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b

Illustrate the process of triangular wave generation.

4 marks

Answer

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610 marks
a

Explain the operation of PLL system.

8 marks

Answer

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b

Define Duty cycle.

2 marks

Answer

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OR
710 marks
a

Explain R-2R ladder DAC process in detail.

6 marks

Answer

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b

What output voltage would be produced by a DAC whose output voltage is 0 to 10 v and whose input binary number is i) 10 (for 2- bit DAC) ii) 0110(for a 4-bit DAC) iii) 10111100 (for a 8- bit DAC)

4 marks

Answer

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810 marks
a

Explain CMOS transmission gate.

5 marks

Answer

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b

When a TTL NAND gate drives five inputs, find total source current and total sink current?

5 marks

Answer

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OR
910 marks
a

Design a 8- input multiplexer and explain the process.

6 marks

Answer

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b

Explain 4-bit magnitude comparator.

4 marks

Answer

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1010 marks
a

Design a 4- bit serial in serial out shift register.

5 marks

Answer

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b

Design a 4 bit BCD decade counter.

5 marks

Answer

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OR
1110 marks
a

Explain internal ROM organization.

7 marks

Answer

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b

List the classification of ROM.

3 marks

Answer

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This page contains the question paper of ANALOG AND DIGITAL IC APPLICATIONS from JNTU for B.Tech EEE III III-I, November/December - 2018, R16.

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