JNTU
JNTU B.Tech III SWITCHING THEORY AND LOGIC DESIGN Previous Question Paper (February - 2022 - R13)
Answer any five questions. All questions carry equal marks.
Main
Realize 2-input X-NOR gate using only NAND gates and only NOR gates.
Answer
To realize a 2-input X-NOR gate (F = A ⊙ B = AB + A'B'), we use universal gates.
Using NAND gates: A 2-input X-NOR gate requires 4 NAND gates. Let the inputs be A and B. The implementation is: F = NAND(NAND(A, NAND(A, B)), NAND(B, NAND(A, B))). This configuration results in the output (A ⊙ B).
Using NOR gates: A 2-input X-NOR gate requires 5 NOR gates. The implementation is: F = NOR(NOR(A, NOR(A, B)), NOR(B, NOR(A, B))). First, generate NOR(A, B), then use it in combination with A and B to produce the final output.
Encode a binary word 11001 into the even parity hamming code.
Answer
To encode the 5-bit data word 11001 into an even parity Hamming code, we require 3 parity bits (p1, p2, p4) because 2n ≥ m + n + 1, where m=5 and n=3.
The bit positions are: 1(p1), 2(p2), 3(d1), 4(p4), 5(d2), 6(d3), 7(d4), 8(d5). Mapping the data bits: d1=1, d2=1, d3=0, d4=0, d5=1.
Parity bit calculations for even parity:
- p1 covers positions 1, 3, 5, 7: p1 ⊕ 1 ⊕ 1 ⊕ 0 = 0, so p1 = 0.
- p2 covers positions 2, 3, 6, 7: p2 ⊕ 1 ⊕ 0 ⊕ 0 = 0, so p2 = 1.
- p4 covers positions 4, 5, 6, 7: p4 ⊕ 1 ⊕ 0 ⊕ 0 = 0, so p4 = 1.
The resulting Hamming code is 0111100.
Design a 4-bit binary to excess-3 code converter.
Answer
Sign in to view the complete answer paper.
Explain unit distance code with an example.
Answer
Sign in to view the complete answer paper.
Simplify the following Boolean function using K-Map:
Answer
Sign in to view the complete answer paper.
Differentiate prime implicants and essential prime implicants.
Answer
Sign in to view the complete answer paper.
Write all differences between combinational and sequential circuits.
Answer
Sign in to view the complete answer paper.
Draw and explain the operation of Master-Slave JK flip-flop.
Answer
Sign in to view the complete answer paper.
Convert the T flip-flop into D flip-flop.
Answer
Sign in to view the complete answer paper.
What is clock skew? Explain it.
Answer
Sign in to view the complete answer paper.
Draw SR latch using only NAND and only NOR gates.
Answer
Sign in to view the complete answer paper.
Design a 3-bit asynchronous binary up-counter using T flip-flops.
Answer
Sign in to view the complete answer paper.
What is meant by state diagram?
Answer
Sign in to view the complete answer paper.
What are the applications of shift registers?
Answer
Sign in to view the complete answer paper.
Design and explain 4-bit ring and Johnson counters using D flip-flops.
Answer
Sign in to view the complete answer paper.
Explain the implementation procedure for weighing machine.
Answer
Sign in to view the complete answer paper.
Explain the minimization of incompletely specified sequential machines with an example.
Answer
Sign in to view the complete answer paper.
Differentiate Mealy and Moore machine.
Answer
Sign in to view the complete answer paper.