JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech III COMPUTER ORGANIZATION AND OPERATING SYSTEMS Previous Question Paper (February - 2022 - R13)

The instruction cycle is the fundamental process by which a computer retrieves a program instruction from its memory, determines what actions the instruction requires, and carries out those actions. It consists of three primary phases: Fetch, Decode, and Execute.

1. Fetch: The CPU fetches the instruction from the memory address stored in the Program Counter (PC). The instruction is loaded into the Instruction Register (IR), and the PC is incremented to point to the next instruction.
2. Decode: The control unit interprets the opcode in the IR to determine the specific operation to be performed and identifies the required operands.
3. Execute: The CPU performs the operation, such as arithmetic, logic, or data transfer, and updates registers or memory as necessary.

Flowchart representation: Start -> Fetch Instruction -> Decode Instruction -> Calculate Effective Address -> Fetch Operands -> Execute Operation -> Store Result -> Check for Interrupts -> Return to Fetch.

Addressing modes define how the effective address of an operand is calculated. Five common modes are:

• Immediate Addressing: The operand is specified directly in the instruction itself. Example: MOV R1, #10 (moves the value 10 into register R1).
• Direct Addressing: The instruction contains the actual memory address where the operand is stored. Example: MOV R1, [1000] (moves the content of memory location 1000 into R1).
• Register Addressing: The operand is held in a CPU register specified by the instruction. This is the fastest mode as it avoids memory access. Example: ADD R1, R2 (adds contents of R2 to R1).
• Register Indirect Addressing: The instruction specifies a register that contains the memory address of the operand. Example: MOV R1, [R2] (moves data from the address stored in R2 into R1).
• Indexed Addressing: The effective address is calculated by adding a constant displacement to the content of an index register. This is useful for accessing arrays. Example: MOV R1, [R2 + offset] (moves data from the calculated address into R1).