JNTU
JNTU B.Tech II DIGITAL LOGIC DESIGN Previous Question Paper (March 2022 - R16)
Answer any five questions
All questions carry equal marks
Main
Convert the given Gray code number to equivalent binary 1001001011110010.
Answer
To convert Gray code 1001001011110010 to binary, the most significant bit (MSB) of the binary number is the same as the Gray code. Each subsequent binary bit is obtained by performing an XOR operation between the previous binary bit and the corresponding Gray code bit.
- Gray code: 1 0 0 1 0 0 1 0 1 1 1 1 0 0 1 0
- Binary MSB: 1
- Next bits: 1⊕0=1, 1⊕0=1, 1⊕1=0, 0⊕0=0, 0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0, 0⊕1=1, 1⊕1=0, 0⊕1=1, 1⊕0=1, 1⊕0=1, 1⊕1=0, 0⊕0=0
The resulting binary number is 1110001101011100.
Convert (A0F9.0EB)16 to decimal, binary, octal.
Answer
Given (A0F9.0EB)16:
- Binary: Convert each hex digit to 4-bit binary: A=1010, 0=0000, F=1111, 9=1001, .=., 0=0000, E=1110, B=1011. Result: 1010000011111001.0000111010112.
- Octal: Group binary bits into sets of three from the radix point: 001 010 000 011 111 001 . 000 011 101 011. Result: 120371.03538.
- Decimal: (10×163) + (0×162) + (15×161) + (9×160) + (0×16-1) + (14×16-2) + (11×16-3) = 40960 + 0 + 240 + 9 + 0 + 0.0546875 + 0.0026855 = 41209.05737304687510.
What is meant by ‘min-term’ and ‘max-term’? Write the procedure to obtain the canonical SOP form of a given logic functions.
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Express the following functions in sum of min-terms and product of max-terms.
i) (xy+z)(y+xz) ii) B'D+A'D+BD.
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Obtain the minimal SOP expression for the switching function using k-map.
Y= Σ m(1,5,7,13,14,15,17,18,21,22,25,29) + Σ d(6,9,19,23,30) draw and explain the logic diagram.
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Simplify the expression Y= π(7, 9, 10, 11, 12, 13, 14, 15) using the k-map method.
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Draw the schematic diagram and truth table for half adder. Explain the design approach for half adder using universal gates. Draw the logic diagrams with relevant expressions.
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Design, draw and explain a 4-bit binary carry look ahead adder.
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Describe the operations performed by the following logic circuits with an example:
(i) Comparator (ii) Decoder (iii) Encoder.
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Explain the operation of a 3-to-8 decoder 74LS138. Realize 4-to-16 decoder using two 3-to-8 decoders. What is meant by ‘edge triggered’? Differentiate SR-FF and JK-FF with their functional operation and excitation tables.
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Draw and explain the circuit diagram of positive edge triggered J-K flip-flop using NOR gates with its truth table. How race around conditions are eliminated?
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Discuss about synchronous and ripple counters. Compare their merits and demerits.
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What do you mean by universal shift register? Draw and explain its circuit diagram and operation.
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Using PLA logic, implement a BCD to excess-3 code converter. Draw and explain its truth table and logic diagram.
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Explain in brief, about logic construction of 32×4 ROM. Draw and explain the relevant logic diagram.
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Derive the PLA programming table for the combinational circuit that squares a 3-bit number. Draw the relevant logic diagram.
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A ROM chip of 4,096 × 8 bits has two chip select inputs and operates from a 5-volt power supply. How many pins are needed for the integrated circuit package? Draw and explain the relevant block diagram.
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