JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD B.Tech II DIGITAL LOGIC DESIGN Previous Question Paper (November/December - 2017 - R15)

B.Tech | II | II-I | R15 | November/December - 2017

Answer PaperPaper Code: 123CTMaximum Marks: 75Time: 3 Hours

Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.

Part A

125 marks
a

Convert the hexadecimal member 68BE to binary and then from binary to octal number.

2 marks

Answer

To convert 68BE16 to binary, replace each hex digit with its 4-bit equivalent: 6=0110, 8=1000, B=1011, E=1110. Thus, 01101000101111102. To convert to octal, group the binary digits into sets of three from the right: 011 010 001 011 111 0. Adding leading zeros gives 011 010 001 011 111 010, which corresponds to 3213728.

b

Write about error detecting and error minimizing codes with examples.

3 marks

Answer

Error detecting codes identify if data has been corrupted during transmission, such as the Parity Bit, which adds an extra bit to make the total number of ones even or odd. Error correcting codes, like Hamming Code, not only detect errors but also identify the specific bit position to correct it by adding redundant parity bits based on the data length.

c

Define pair, quad and octet with examples in K – maps.

2 marks

Answer

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d

Explain SOP and POS of Boolean functions.

3 marks

Answer

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e

Write the logic diagram and truth table of a Full – adder.

2 marks

Answer

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f

What is an encoder? Write the truth table of a parity encoder.

3 marks

Answer

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g

What are sequential circuits? Give some examples.

2 marks

Answer

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h

Explain the working of a 4 – bit ripple counter with help of truth table.

3 marks

Answer

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i

List various types of semiconductor memories and write their uses.

2 marks

Answer

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j

What are programmable logic arrays? What are their applications?

3 marks

Answer

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Part B

210 marks
a

Explain various number systems used in digital logic design with examples and their representation with examples.

5 marks

Answer

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b

Simplify the following Boolean functions to a minimum number of literals (i) (x+y)(x'+y) (ii) xy+x'z+yz

5 marks

Answer

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OR
310 marks
a

Explain about signed binary number and Floating point representation of number system with examples and discuss their advantages.

5 marks

Answer

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b

Express the Boolean function F = A + B'C in a sum of Minterms and write its truth table.

5 marks

Answer

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410 marks
a

Explain the design procedure for 4 – variable K – map and discuss its simplification methods using prime implicants methods.

5 marks

Answer

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b

Simplify the Boolean function using K- map method. F(A, B, C, D) = Σ(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14)

5 marks

Answer

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OR
510 marks
a

Implement the following Boolean function with NAND gates after simplification F(A, B, C) = Σ(1, 2, 3, 4, 5, 7)

5 marks

Answer

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b

Simplify the following Boolean function in sum of products and product of sums F(A, B, C, D) = Σ(0, 1, 2, 5, 8, 9, 10)

5 marks

Answer

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610 marks
a

Design a combinational circuit that converts a 4-bit Gray code to a 4-bit binary number. Implement the circuit with XOR gates.

5 marks

Answer

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b

Design a BCD to decimal decoder using the unused combinations of the BCD code as don’t care conditions.

5 marks

Answer

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OR
710 marks
a

Explain the design procedure for constructing BCD adder – subtractor circuit using BCD adder and 9’s complementer block diagrams.

5 marks

Answer

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b

Construct a 4 to 16 line decoder with five 2 – to - 4 – line decoder with enable.

5 marks

Answer

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810 marks
a

Explain the state equation, state table and state diagrams of sequential circuit with block diagram.

5 marks

Answer

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b

Draw the block diagram of a 4 bit synchronous Binary counter using J-K Flip-flops.

5 marks

Answer

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OR
910 marks
a

Explain the analysis of clocked sequential circuit using T Flip Flops with help of circuit diagram, state diagram and state table.

5 marks

Answer

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b

Draw the block diagram of a 4 bit universal shift Register and explain its working with its function table.

5 marks

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1010 marks
a

Explain about memory decoding and address multiplexing in memories with the help of neat diagrams.

5 marks

Answer

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b

Draw the logic diagram of a Programmable Logic Array with 3 inputs, 4 product terms and 2 outputs.

5 marks

Answer

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OR
1110 marks
a

Discuss various types of sequential programmable devices with block diagrams.

5 marks

Answer

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b

Tabulate the PLA programming table for the following Boolean functions and minimize the number of product terms: A(x,y,z) = Σ(1,2,4,6), B(x,y,z) = Σ(0,1,6,7), C(x,y,z) = Σ(2,6), D(x,y,z) = Σ(1,2,3,5,7)

5 marks

Answer

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About this paper

This page contains the question paper of DIGITAL LOGIC DESIGN from JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD for B.Tech IT II II-I, November/December - 2017, R15.

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