JNTU
JNTU B.Tech II DIGITAL LOGIC DESIGN Previous Question Paper (April/May - 2018 - R15)
Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.
Part A
Find the possible base so that the expression (292)10 = (204)b.
Answer
Given (292)10 = (204)b, we expand the base-b side: 2b2 + 0b1 + 4b0 = 292. This simplifies to 2b2 + 4 = 292, or 2b2 = 288. Thus, b2 = 144, which gives b = 12.
Construct AND, OR and NOT gate using universal gates.
Answer
Using NAND gates:
- NOT: Connect both inputs of a 2-input NAND gate together.
- AND: Connect the output of a 2-input NAND gate to the input of a NOT gate (constructed as above).
- OR: Connect the outputs of two NOT gates (each fed by one input) to the inputs of a NAND gate.
Implement Ex-OR with NAND gates.
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List the max terms of the function F(x,y,z) = xyz + x'z.
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Define combinational circuits and give examples.
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Design a half adder circuit.
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Differentiate between combinational and sequential circuits.
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What are direct inputs in a flip-flop and why they are used?
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What is the difference between PLA and PAL?
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Design a circuit using ROM that accepts a 2-bit number and generates a binary number equal to the square of the input number.
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Part B
Represent (8620)10 in BCD and Excess-3 code.
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With an example show how Hamming Code can be used to correct single error and detect double error.
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Convert (FACE07C2)H to binary and Octal.
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Find the complement of F = x'yz' + x'y'z and realize the function using gates.
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Construct a 7-bit single error correcting code to represent the decimal digits by using Excess-3 code words. Use even parity check.
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Implement the function F(w,x,y,z) = Σ(0, 2, 5, 7, 10, 13) using two level forms of NAND-AND and NOR-OR.
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Simplify F(w,x,y,z) = Σ(0,2,5, 6, 7, 8, 10) in POS.
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Find all the prime implicants for the Boolean function F(w,x,y,z) = Σ(0,2,4,5,6,7,8,10,13,15) and find which are essential.
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Simplify BD + BCD' + AB'C'D' and implement using two level NAND gates.
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What is Multiplexer? Implement a full subtractor with two 4x1 multiplexers.
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Construct a 12-bit Magnitude comparator using 4-bit magnitude comparators.
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Construct 4x16 line decoder using 3x8 line decoders.
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Design a BCD to Excess-3 code convertor.
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Design a circuit using JK flip-flops which has one input x and generates a high output if the sequence 0101 is detected.
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Design a 4-bit Ring Counter.
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Design a T flip-flop using JK flip-flop. Use k-maps for the design.
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Realize the functions using PAL: F1(A,B,C, D) = Σ(2, 12, 13); F2(A,B,C,D) = Σ(7, 8, 9, 10, 11, 12, 13, 14, 15); F3(A,B,C,D) = Σ(0,2, 3, 4, 5, 6, 7, 8, 10, 11, 15); F4(A,B,C) = Σ(1,2,8,12,13)
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List the PLA programming table for the BCD to Excess-3 converter.
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