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JNTU B.Tech II DIGITAL LOGIC DESIGN Previous Question Paper (May/June - 2019 - R15)

B.Tech | II | I | R15 | May/June - 2019

Answer PaperPaper Code: 123CTMaximum Marks: 75Time: 3 Hours

Note: This question paper contains two parts A and B. Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5 Units. Answer any one full question from each unit. Each question carries 10 marks and may have a, b, c as sub questions.

Part A

125 marks
a
What is Diminished Radix Complement?
2 marks

Answer

The diminished radix complement of an n-digit number N in base r is defined as (r^n - 1) - N. For a binary number, this is known as the 1's complement, obtained by subtracting each bit from 1 or simply inverting all bits.

b
What is Minterms and Maxterms?
3 marks

Answer

A minterm is a product term (AND operation) that includes all variables of a function in either complemented or uncomplemented form, representing a single row in a truth table where the output is 1. A maxterm is a sum term (OR operation) that includes all variables, representing a row where the output is 0.

c
What is Prime Implicants?
2 marks

Answer

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d
What is don’t-care conditions? Explain it uses.
3 marks

Answer

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e
Explain about 4-bit Binary Adder.
2 marks

Answer

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f
Explain about Multiplexers with three-state gates.
3 marks

Answer

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g
Explain about characterstic equation for jk flip flop.
2 marks

Answer

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h
Define the following terms of a flip flop. i) Hold time ii) Set up time iii) Propagation delay time.
3 marks

Answer

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i
Explain about sequential memory.
2 marks

Answer

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j
Explain about the memory read and write operations.
3 marks

Answer

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Part B

210 marks
a
If the numbers (+9,742)10 and (+641)10 are in signed magnitude format, their sum is (+10,383)10 and requires five digits and a sign. Convert the numbers to signed 10’s complement form and find the following sums: (i) (+9,742) + (+641) (ii) (+9,742) + (-641)
5 marks

Answer

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b
Convert the hexadecimal number 64CD H to binary and then convert it from binary to octal.
5 marks

Answer

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OR
310 marks
a
Express the complement of the following function F in sum of minterms form F(A,B,C,D) = ∑(2, 4, 7, 10, 12, 14)
5 marks

Answer

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b
Show that the dual of the exclusive OR is equal to its complement.
5 marks

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410 marks
a
Simplify the following Boolean expressions, using four-variable maps: i) A′B′C′D′ + AC′D + B′CD′ + A′BCD + BC′D ii) A′B′C′D′ + BC′D + A′C′D + A′BCD + ACD′
5 marks

Answer

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b
Find all the prime implicants for the following Boolean functions, and determine which are essential: F (w, x, y, z) = ∑ (0, 2, 4, 5, 6, 7, 8, 10, 13, 15)
5 marks

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OR
510 marks
a
Draw a NAND logic diagram that implements the complement of the following function: F(A,B,C,D) = ∑(0, 1, 2, 3, 6, 10, 11, 14).
5 marks

Answer

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b
Find the minterms of the following Boolean expressions by first plotting each function in a map: (i) xy + yz + xy'z (ii) C'D + ABC' + ABD' + A'B'D.
5 marks

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6
Design a combinational circuit with three inputs, x, y and z and three outputs, A, B and C. When the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is two less than the input.
10 marks

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OR
710 marks
a
Implement a full adder with two 4 × 1 multiplexers.
5 marks

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b
Design a four-input priority encoder with input D0 having the highest priority and input D3 the lowest priority.
5 marks

Answer

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810 marks
a
Draw the logic diagram of a four-bit binary-ripple countdown counter using flip-flops that trigger on the positive edge of the clock.
5 marks

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b
Realize D-latch using R-S latch. How it is different from D-flip flop. Draw the circuit using NAND gates and explain.
5 marks

Answer

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OR
910 marks
a
Draw and explain with the help of truth table the logic diagram of a master slave D flip-flop using NAND gates. With active low preset and clear and with negative edge triggered clock.
5 marks

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b
Compare merits and demerits of ripple and synchronous counters.
5 marks

Answer

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10
A 16K×4 memory uses coincident decoding by splitting the internal decoder into X-selection and Y-selection.
10 marks
a
What is the size of each decoder, and how many AND gates are required for decoding the address?
5 marks

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b
Determine the X and Y selection lines that are enabled when the input address is the binary equivalent of 6,000.
5 marks

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OR
1110 marks
a
Explain about different types of ROM.
5 marks

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b
Explain about Cache memory.
5 marks

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